Bandgap reference circuits are widely used in analog circuits for providing stable, voltage-independent, and temperature-independent reference voltages. The bandgap reference circuits operate on the principle of compensating the negative temperature coefficient of a base-emitter junction voltage VBE of a bipolar transistor with the positive temperature coefficient of thermal voltage VT, with thermal voltage VT being equal to kT/q, wherein k is Boltzmann constant, T is absolute temperature, and q is electron charge (1.6×10−19 coulomb). At room temperature, the variation of VBE with temperature is −2.2 mV/C, while the variation of thermal voltage VT with temperature is +0.086 mV/C.
As the name suggests, the voltages generated by the bandgap reference circuits are used as references, and hence the outputted reference voltages need to be highly stable. To be specific, the outputted reference voltages need to be free from temperature variations, voltage variations, and process variations. However, the power supply voltages provided to the bandgap reference circuits are often not stable and may have high variations. The variation in the power supply voltages adversely affects the operation of bandgap references circuits.
FIG. 1 illustrates a bandgap reference circuit and a start-up circuit for starting up the bandgap reference circuit. The start-up circuit includes PMOS transistors P2′ and Psu′. During the standby time of the bandgap reference circuit, voltage VA′ at node A′ is equal to positive power supply voltage VDD′, and voltage VB′ at node B′ is equal to power supply voltage VSS′. To activate the start-up circuit, a low voltage is applied to node EN_L′, so that PMOS transistor Psu′ is turned on. Accordingly, voltage VB′ is increased, and the output voltage (which is voltage VA′) of operational amplifier OP′ is reduced. With the reduction in voltage VA′, PMOS transistor P1′ is turned on and the bandgap reference circuit starts to function.
The reduction in voltage VA′ also results in PMOS transistor P2′ being less conductive, and the voltage at node EN_L′ increases. Eventually, the increase in the voltage at node EN_L′ results in PMOS transistor Psu′ to be turned off and the bandgap reference circuit functions by itself.
The conventional circuit, as shown in FIG. 1, suffers from drawbacks. The start-up of the bandgap reference circuit is performed by using PMOS transistor Psu′ to charge node B′ in order to change the output of operational amplifier OP′. The start-up time is accordingly long due to the response time of operational amplifier OP′. Further, since positive power supply voltage VDD′ may vary in a wide range, when power supply voltage VDD′ is low, the current passing through PMOS transistor Psu′ is low, and hence the charging time of node B′ is long, which means that the start-up time is long.
Unfortunately, the problem of the long start-up time cannot be solved by increasing the driving capability of PMOS transistor Psu′ due to the small design margin. The small design margin is due to the fact that the driving capability of PMOS transistor Psu′ can neither be high nor low. The driving current of PMOS transistor Psu′ cannot be too low because otherwise, the start-up time is long. On the other hand, the driving current of PMOS transistor Psu′ cannot be too high. Otherwise, after the start-up stage of the bandgap reference circuit, the voltage at node EN_L′ may not be low enough for turning off PMOS transistor Psu′. This causes unnecessary power consumption. Further, since PMOS transistor Psu′ provides bias currents to resistors R1′, R2′, and R3′ and bipolar transistors Q1′ and Q2′, the bias condition is adversely affected and the output voltage of the bandgap reference circuit is adversely affected.